1. Field of the Invention
The present invention relates to a method for fabricating Group III nitride compound semiconductors. More particularly, the present invention relates to a method for fabricating Group III nitride compound semiconductors employing epitaxial lateral overgrowth (ELO). The Group III nitride compound semiconductors are generally represented by AlxGayIn1xe2x88x92xxe2x88x92yN (wherein 0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, and 0xe2x89xa6x+yxe2x89xa61), and examples thereof include binary semiconductors such as AlN, GaN, and InN; ternary semiconductors such as AlxGa1xe2x88x92xN, and GaxIn1xe2x88x92xN (wherein 0 less than xc3x97 less than 1); and quaternary semiconductors such as AlxGayIn1xe2x88x92xxe2x88x92yN (wherein 0 less than x less than 1, 0 less than y less than 1, and 0 less than x+y less than 1). In the present specification, unless otherwise specified, xe2x80x9cGroup III nitride compound semiconductorsxe2x80x9d encompass Group III nitride compound semiconductors which are doped with an impurity so as to assume p-type or n-type conductivity.
2. Description of the Related Art
Group III nitride compound semiconductor are direct-transition semiconductors exhibiting a wide range of emission spectra from UV to red light when used in a device such as a light-emitting device, and have been used in light-emitting devices such as light-emitting diodes (LEDs) and laser diodes (LDs). In addition, due to their broad band gaps, devices employing the aforementioned semiconductors are expected to exhibit reliable operational characteristics at high temperature as compared with those employing semiconductors of other types, and thus application thereof to transistors such as FETs has been energetically studied. Moreover, since Group III nitride compound semiconductors contain no arsenic (As) as a predominant element, application of Group III nitride compound semiconductors to various semiconducting devices has been longed for from the environmental aspect. Generally, these Group III nitride compound semiconductors are formed on a sapphire substrate.
However, when a Group III nitride compound semiconductor is formed on a sapphire substrate, misfit-induced dislocations occur due to difference between the lattice constant of sapphire and that of the semiconductor, resulting in poor device characteristics. Misfit-induced dislocations are threading dislocations which penetrate semiconductor layers in a longitudinal direction (i.e., in a direction vertical to the surface of the substrate), and Group III nitride compound semiconductors are accompanied by the problem that dislocations in amounts of approximately 109 cmxe2x88x922 propagate therethrough. The aforementioned dislocations propagate through layers formed from Group III nitride compound semiconductors of different compositions, until they reach the uppermost layer. When such a semiconductor is incorporated in, for example, a light-emitting device, the device poses problems of unsatisfactory device characteristics in terms of threshold current of an LD, service life of an LED or LD, etc. On the other hand, when a Group III nitride compound semiconductor is incorporated in any of other types of semiconductor devices, because electrons are scattered due to defects in the Group III nitride compound semiconductor, the semiconductor device comes to have low mobility. These problems are not solved even when another type of substrate is employed.
The aforementioned dislocations will next be described with reference to a sketch of FIG. 11. FIG. 11 shows a substrate 91, a buffer layer 92 formed thereon, and a Group III nitride compound semiconductor layer 93 further formed thereon. Conventionally, the substrate 91 is formed of sapphire or a similar substance and the buffer layer 92 is formed of aluminum nitride (AlN) or a similar substance. The buffer layer 92 formed of aluminum nitride (AlN) is provided so as to relax misfit between the sapphire substrate 91 and the Group III nitride compound semiconductor layer 93. However, generation of dislocations is not reduced to zero. Threading dislocations 901 propagate upward (in a vertical direction with respect to the substrate surface) from dislocation initiating points 900, penetrating the buffer layer 92 and the Group III nitride compound semiconductor layer 93. When a semiconductor device is fabricated by stacking various types of Group III nitride compound semiconductors of interest on the Group III nitride compound semiconductor layer 93, threading dislocations further propagate upward, through the semiconductor device, from dislocation arrival points 902 on the surface of the Group III nitride compound semiconductor layer 93. Thus, according to conventional techniques, problematic propagation of dislocations cannot be prevented during formation of Group III nitride compound semiconductor layers.
The present invention has been accomplished in an attempt to solve the aforementioned problems, and an object of the present invention is to fabricate a Group III nitride compound semiconductor with suppressed generation of threading dislocations.
In order to attain the aforementioned object, the invention drawn to a first feature provides a method for fabricating a Group III nitride compound semiconductor through epitaxial growth, which comprises using a mask, etching an underlying layer comprising at least one layer of a Group III nitride compound semiconductor, the uppermost layer of the underlying layer being formed of a first Group III nitride compound semiconductor, to thereby form an island-like structure, such as a dot-like, stripe-shaped, or grid-like structure, and epitaxially growing, vertically and laterally, a second Group III nitride compound semiconductor not grown on the mark epitaxially, with the mask remaining on the upper surface of the uppermost layer in the underlying layer of the trench and with a sidewall of a trench serving as a nucleus for epitaxial growth, the post and the trench being formed by etching the first Group III nitride compound semiconductor so as to form an island-like structure such as a dot-like, stripe-shaped, or grid-like structure. In the present specification, the term xe2x80x9cunderlying layerxe2x80x9d is used so as to collectively encompass a Group III nitride compound semiconductor single layer and a multi-component layer containing at least one Group III nitride compound semiconductor layer. The second Group III nitride compound semiconductor layer which xe2x80x9cnot grown on the mask epitaxiallyxe2x80x9d means that the second Group III nitride compound semiconductor layer hardly grows on the mask. Practically, it may be sufficient that the mask be covered by lateral epitaxial growth (ELO). The expression xe2x80x9cisland-like structurexe2x80x9d conceptually refers to the pattern of the upper portions of the posts formed through etching, and does not necessarily refer to regions separated from one another. Thus, upper portions of the posts may be continuously connected together over a considerably wide area, and such a structure may be obtained by forming the entirety of a wafer into a stripe-shaped or grid-like structure. The sidewall/sidewalls of the trench refers not only to a plane vertical to the substrate plane and the surface of a Group III nitride compound semiconductor, but also to an oblique plane. The trench may have a V-shaped cross-section with no flat surface on the bottom of the trench. Unless otherwise specified, these definitions are equally applied to the below-appended claims.
The invention drawn to a second feature provides a method for fabricating a Group III nitride compound semiconductor wherein the underlying layer is formed on the substrate and the etching is carried out until the substrate is exposed.
The invention drawn to a third feature provides a method for fabricating a Group III nitride compound semiconductor according to the invention as recited in connection with the first feature, wherein the depth and the width of the trench are determined such that lateral growth from the sidewall/sidewalls for covering the trench proceeds faster than vertical growth from the bottom portion of the trench for burying the trench. As used herein, in the trench having a V-shaped cross-section with no flat surface on the bottom of the trench, the bottom portion of the trench means the bottom formed through epitaxial growth.
The invention drawn to a fourth feature provides a method for fabricating a Group III nitride compound semiconductor wherein substantially all the sidewalls of the trench are a {11-20} plane.
The invention drawn to a fifth feature provides a method for fabricating a Group III nitride compound semiconductor wherein the first Group III nitride compound semiconductor and the second Group III nitride compound semiconductor have the same composition. As used herein, the term xe2x80x9csame compositionxe2x80x9d does not exclude differences on a doping level (differences by less than 1 mol %) from its meaning.
The invention drawn to a sixth feature provides a method for fabricating a Group III nitride compound semiconductor wherein the underlying layer comprises plural units of the buffer layer formed on the substrate and the Group III nitride compound semiconductor layer epitaxially grown thereon.
The invention drawn to a seventh feature provides a method for fabricating a Group III nitride compound semiconductor wherein compositions and a temperature for forming the buffer layer are different from those of the Group III nitride compound semiconductor layer formed adjacent to the buffer layer.
The invention drawn to an eighth feature provides a method for fabricating a Group III nitride compound semiconductor wherein a portion of the compositions in the first Group III nitride compound semiconductor layer is substituted for or doped with elements whose atomic radius is larger than that of predominant elements of the first Group III nitride compound semiconductor layer. Here the predominant elements are nitrogen (N) and Group III elements. The element of a large atomic radius is, i.e., phosphorus (P), arsenic (As), and bismuth (Bi), and Group III elements are aluminum (Al), gallium (Ga), indium (In), and thallium (Tl), arranging from smaller to larger atomic radius order.
The invention drawn to a ninth feature provides a method for fabricating a Group III nitride compound semiconductor according to the invention as recited in connection with any one of the first to eighth features, further comprising forming a second mask in order to cover the bottom surface of the trench before growing the second Group III nitride compound semiconductor layer epitaxially.
The invention drawn to a tenth feature provides a Group III nitride compound semiconductor device, comprising a single Group III nitride compound semiconductor layer or plural Group III nitride compound semiconductor layers functioning as a semiconductor device, on a portion of a Group III nitride compound semiconductor layer, provided lateral epitaxial growth, produced through a method for fabricating a Group III nitride compound semiconductor as recited in connection with any one of the first to ninth features.
The invention drawn to an eleventh feature provides a method for fabricating a Group III nitride compound semiconductor as recited in connection with any one of the first to ninth features, further comprising removing substantially entire portions except for an upper layer formed on a portion provided through lateral epitaxial growth, to thereby obtain a Group III nitride compound semiconductor layer.
The outline of an example of the method for fabricating a Group III nitride compound semiconductor of the present invention will next be described with reference to FIG. 1. Although FIG. 1 illustrates layers accompanied by a substrate 1 and a buffer layer 2 so as to facilitate description and understanding of relevant dependent claims, the substrate 1 and the buffer layer 2 are not essential elements of the present invention, as the present invention is to produce a Group III nitride compound semiconductor layer including a region in which threading dislocations in the vertical direction are reduced from a Group III nitride compound semiconductor having threading dislocations in the vertical direction. The gist of the operation and effects of the present invention will next be described with reference to an embodiment in which a Group III nitride compound semiconductor layer 31 having threading dislocations in the vertical direction (direction vertical to the substrate surface) is provided on the substrate 1 via the buffer layer 2.
As shown in FIG. 1A, the first Group III nitride compound semiconductor layer 31 is formed as an underlying layer by etching with a mask 4 to thereby form an island-like structure such as a dot-like, stripe-shaped, or grid-like structure, so as to provide a trench/post. Thus, a second Group III nitride compound layer 32, which is not grown on the mask 4 epitaxially, can be epitaxially grown, vertically and laterally without removing the mask 4 formed on a top surface of the post and with a sidewall/sidewalls of the trench serving as a nucleus for epitaxial growth, to thereby bury the trench and also grow the layer upward. In this case, propagation of threading dislocations contained in the Group III nitride compound semiconductor layer 31 can be prevented in the upper portion of the second Group III nitride compound semiconductor 32 that is formed through lateral epitaxial growth, and a region in which treading dislocations are reduced is provided in the thus-buried trench (first feature). The second Group III nitride compound semiconductor layer 32 which is epitaxially grown vertically and laterally, as shown in FIG. 1B, comprises a portion grown with sidewalls of the trench serving as a nucleus for epitaxial growth and a portion grown with bottom layer (bottom portion) of the trench serving as a nucleus for epitaxial growth. The rate of epitaxial growth in vertical direction is substantially the same as that in lateral direction. Accordingly, epitaxial growth in the present invention should be carried out so that a portion with sidewalls of the trench serving as a nucleus for epitaxial growth exists. Because of epitaxial growth, discontinuous interface of the Group III nitride compound semiconductor layer 31 and the second Group III nitride compound semiconductor layer 32 hardly exists, that results in obtaining a stabilized structure. Epitaxial growth of the second Group III nitride compound semiconductor 32 vertically and laterally is carried out until the mask 4 is covered thereby (FIGS. 1D and 1E). Because the second Group III nitride compound semiconductor layer 32 formed on the mask 4 did not grow epitaxially from the upper surface of the mask 4, new dislocation cannot be generated.
In etching the underlying layer, when we expose the substrate, or further etch a portion of the substrate, epitaxial growth in lateral direction is surely realized. That is because the second Group III nitride compound semiconductor layer has difficulty to grow on the substrate surface serving as a nucleus. As a result, threading dislocations remaining at the underlying layer can be ideally removed, and crystallinity of the second Group III nitride compound semiconductor layer which is epitaxially grown in lateral direction is surely improved (second feature).
When the rate that the second Group III nitride compound semiconductor 32, which buries the trench, epitaxially grows in lateral direction from sidewalls of the trench and coalescences to the lateral epitaxial growth layer starting from the sidewall of the trench facing to each other is faster than the rate of epitaxial growth in vertical direction from the bottom layer (bottom portion) to the upper layer of the trench, threading dislocations propagated from the first Group III nitride compound semiconductor layer 31 is remarkably suppressed in the upper portion of the thus-buried Group III nitride compound semiconductor 32, to thereby provide a crystal region of remarkably high quality (third feature). In this case, as shown in FIG. 1C, a portion which is grown from the bottom portion of the trench serving as a nucleus is not exposed at the surface but remains as cavities. And over the cavities, growth fronts of the Group III nitride compound semiconductor 32 grown from the two sidewalls of the trench, serving as nuclei, coalesce. The propagation of threading dislocations from the first Group III nitride compound semiconductor can be prevented at the cavities. Also, the structure of the device can be stabilized.
The aforementioned lateral epitaxial growth can be readily attained when the sidewall formed of the Group III nitride compound semiconductor layer 31 is a {11-20} plane (fourth feature). During lateral epitaxial growth, at least a top of the growth front may remain a {11-20} plane. When the first Group III nitride compound semiconductor and the second Group III nitride compound semiconductor have the same composition, rapid lateral epitaxial growth can be readily attained (fifth feature).
Through the procedure as described above, threading dislocations propagated from the Group III nitride compound semiconductor layer 31 are prevented, to thereby provide a stable structure, and the Group III nitride compound semiconductor 32 can be formed without increasing electrical resistance attributed to a discontinuous interface. Although FIG. 1 illustrates a sidewall of the trench vertical to the substrate plane, the present invention is not limited thereto, and the sidewall may be an oblique plane. The trench may have a V-shaped cross-section with not flat surface on the bottom of the trench. These features are equally applied to the descriptions below.
The underlying layer comprises arbitrary units of the buffer layer formed on the substrate and the Group III nitride compound semiconductor layer thereon, and each of the buffer layer functions to decrease threading dislocations (sixth feature). Here compositions and a temperature for forming the buffer layer are different from those of the Group III nitride compound semiconductor layer formed adjacent to the buffer layer (seventh feature). This is shown in FIG. 6A.
Because the Group III nitride compound semiconductor has crystalline expansion strain induced by defects of nitrogen atoms, doping elements whose atomic radius is larger than that of predominant elements generates compression strain, to thereby improve crystallinity (eighth feature). For example, by doping indium (In), which is larger in atomic radius than aluminum (Al) and gallium (Ga), or arsenic (As), which is larger in atomic radius than nitrogen (N), to a Group III nitride compound semiconductor which is represented by AlxGa1-xN (0xe2x89xa6xxe2x89xa61) and which does not contain indium (In) and arsenic (As), crystalline expansion strain induced by defects of nitrogen atoms can be compensated by compression strain, to thereby provide improved crystallinity of the Group III nitride compound semiconductor layer 31. In this case, since acceptor impurities easily occupy the positions of Group III atoms, p-type crystals can be obtained as grown. Through the thus-attained improvement of crystallinity combined with the features of the present invention, threading dislocation can be further reduced to approximately {fraction (1/100)} to {fraction (1/1000)}. In the case of an underlying layer comprising two or more repetitions of a buffer layer and a Group III nitride compound semiconductor layer, the Group III nitride compound semiconductor layers are further preferably doped with an element greater in atomic radius than a predominant component element.
When the bottom surface of the trench is covered by the second mask, vertical growth from the surface of the substrate can be completely prevented (ninth feature). That is shown in FIGS. 6C and 6D.
By forming a semiconductor device, e.g., a light-emitting device or an FET, on a portion of a Group III nitride compound semiconductor layer that is formed through lateral epitaxial growth through the above step, an improved service life time and mobility and an improved threshold value for LD can be obtained (tenth feature).
By selectively separating, from the other layers, an upper layer formed on a portion of the Group III nitride compound semiconductor layer that is formed through lateral epitaxial growth through the above step, there can be produced a high-crystallinity Group III nitride compound semiconductor in which crystal defects such as dislocations are remarkably suppressed (eleventh feature). In this connection, for the sake of convenience in manufacture, the expression xe2x80x9cremoving substantially entire portionsxe2x80x9d does not exclude the case in which a portion containing threading dislocations is present to some extent.